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26 27 25 28 24 29 23 30 22 31 21 32 20 33 19 34 18 35 17 36 16 37 15 38 14 39 13 40 12 41 11 42 10 43 9 44 8 45 7 46 6 47 5 48 4 49 3 50 2 51 1 52 m37210m3-xxxsp m37210m4-xxxsp m37211m2-xxxsp ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? pin configuration (top view) p5 2 /r p5 3 /g p5 4 /b p5 5 /out p2 0 p2 1 p2 2 p2 3 p0 4 p0 5 p0 6 p0 7 p1 0 p1 1 p1 2 p1 3 p1 4 p1 5 /a-d1 p1 6 /a-d2 p1 7 /a-d3 p3 0 p3 1 reset osc1 osc2 v cc outline 52p4b description the m37210m3-xxxsp/fp is a single-chip microcomputer designed with cmos silicon gate technology. it is housed in a 52-pin shrink plastic molded dip or a 64-pin plastic molded qfp. this single-chip microcomputer is useful for the channel selection system for tvs because it provides pwm function, osd display function and so on. in addition to their simple instruction sets, the rom, ram, and i/o addresses are placed on the same memory map to enable easy pro- gramming. the features of the m37210e4-xxxsp/fp and the m37210e4sp/fp are similar to those of the m37210m4-xxxsp except that these chips have a built-in prom which can be written electrically. the differences between the m37210m3-xxxsp/fp, the m37210 m4-xxxsp, and the m37211m2-xxxsp are the rom size, the ram size, and the pwm outputs as shown below. accordingly, the follow- ing descriptions will be for the m37210m3-xxxsp/fp unless other- wise noted. note : after the reset, set the stack page selection bit which is set 1 to 0 because the internal ram of the m37211m2-xxxsp is in only the zero page. features ? number of basic instructions ..................................................... 69 ? memory size rom ................ 12 k bytes (m37210m3-xxxsp/fp) 16 k bytes (m37210m4-xxxsp) 8 k bytes (m37211m2-xxxsp) ram ................. 256 bytes (m37210m3-xxxsp/fp) 320 bytes (m37210m4-xxxsp) 192 bytes (m37211m2-xxxsp) rom for display......................................... 3 k bytes ram for display .......................................... 72 bytes ? the minimum instruction execution time ........................................... 0.5 m s (at 8mhz oscillation frequency) ? power source voltage ..................................................... 5v 10% ? power dissipation .............................................................. 110mw (at 4mhz oscillation frequency, v cc = 5.5v, at crt display) ? subroutine nesting ............................................... 96 levels (max.) ? interrupts ....................................................... 12 types, 12 vectors ? 8-bit timers .................................................................................. 4 ? programmable i/o ports (ports p0, p1, p2, p3, p4) ......................................................... 25 ? output ports (ports p5, p6) .......................................................... 8 ? output ports (ports p5 2 , p5 6 ) ..................................................... 12 ? 12 v withstand ports ....................................................................4 ? serial i/o ............................................................ 8-bit 5 1 channel ? pwm output circuit ............... (14-bit 5 1, 6-bit 5 8) ... m37210m3 m37210m4 (14-bit 5 1, 6-bit 5 6) .... m37211m2 type name m37210m3-xxxsp/fp m37210m4-xxxsp m37211m2-xxxsp rom size 12 k bytes 16 k bytes 8 k bytes ram size 256 bytes 320 bytes 192 bytes 6-bit pwm outputs 8 8 6 note : the m37211m2-xxxsp does not have the pwm6 and the pwm7. ? a-d comparator (5-bit resolution) ................................ 5 channels ? crt display function display characters ..................................... 18 characters 5 2 lines (16 lines max.) character kinds ................................................................ 96 kinds dot structure ............................................................. 12 5 16 dots character size .................................................................... 3 kinds character color kinds (it can be specified by the character) max. 7 kinds (r, g, b) raster color (max. 7 kinds) display layout horizontal ..................................................................... 64 levels vertical ....................................................................... 128 levels bordering (horizontal and vertical) application tv mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller h sync v sync p6 0 /pwm0 p6 1 /pwm1 p6 2 /pwm2 p6 3 /pwm3 p0 0 /pwm4 p0 1 /pwm5 p0 2 /pwm6 p0 3 /pwm7 p4 2 /s in /a-d5 p4 1 /s clk p4 0 /s out (/ in ) d-a p3 5 /int2/a-d4 p3 4 /int1 p3 3 /tim3 p3 2 /tim2 p2 4 p2 5 p2 6 p2 7 cnv ss x in x out v ss 1
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 2 outline 64p6n-a nc : no connection pin configuration (top view) 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 m37210m3-xxxfp p3 0 nc p3 1 reset osc1 osc2 vcc nc nc v ss x out x in cnv ss p2 7 nc nc p2 1 nc p2 0 p5 5 /out p5 4 /b p5 3 /g p5 2 /r nc nc h sync v sync p6 0 /pwm0 p6 1 /pwm1 p6 2 /pwm2 nc p6 3 /pwm3 p2 2 p2 3 p0 4 p0 5 p0 6 p0 7 p1 0 nc p1 1 p1 2 p1 3 p1 4 nc p1 5 /a-d1 p1 6 /a-d2 p1 7 /a-d3 p0 0 /pwm4 p0 1 /pwm5 p0 2 /pwm6 p0 3 /pwm7 nc p4 2 /s in /a-d5 p4 1 /s clk p4 0 /s out /(/ in ) d-a p3 5 /int2/a-d4 p3 4 /int1 p3 3 /tim3 p3 2 /tim2 p2 4 p2 5 p2 6 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 3 functional block dia gram of m37210m3-xxxsp notes 1 : the m37211m2-xxxsp does not have pwm outputs of pi ns 9 and 10. 2 : 320 bytes for m37210m4-xxxsp and 192 bytes for m37211m2- xxxsp 3 : 16 k bytes for m37210m4-xxxsp and 8 k bytes for m37211m2 -xxxsp clock input clock output reset input reset 24 25 30 27 26 23 (5v) (0v) (0v) v cc v ss cnv ss d-a 14 h sync 12 y sync osc1 osc2 29 28 14-bit pwm circuit 6-bit pwm circuit instruction decoder control signal instruction register crt circuit pwm7 pwm6 pwm5 pwm4 pwm3 pwm2 pwm1 pwm0 timer count source selection circuit timer 1 t1 (8) timer 2 t2 (8) timer 3 t3 (8) timer 4 t4 (8) tim2 tim3 interrupt interval determination circuit si/o(8) p4(3) s in s clk s out p6(4) p3(6) p5(4) out b g r a-d5 int1, int2 int1 int2 a-d4 p2(8) p1(8) p0(8) a-d1 a-d2 a-d3 3 5 4 1 4 2 4 3 4 4 1 0 9 8 7 3 3 3 4 3 5 3 6 3 73 8 3 9 4 0 2 22 1 2 0 1 9 4 5 4 6 4 7 4 8 1 51 6 1 7 1 83 1 3 2 1 11 2 1 3 6 5 4 3 4 9 5 05 15 2 i /o port p0 i /o port p1 i /o port p2 i /o port p3 i /o port p4 output port p6 video signal output a-d compa- rator stack pointer (8) index register y (8) accumulator a(8) 8-bit arithmetic and logical unit ram 256bytes (note 2) program counter pc h (8) program counter pc l (8) rom 12 k bytes (note 3) clock generating circuit address bus data bus x in x out index register x (8) processor status register ps(8)
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 4 m37210m3-xxxsp, m37210m4-xxxsp , m37211m2-xxxsp m37210m3-xxxfp number of character character dot construction kinds of characters character size kinds of color display position (horizontal, vertical) functions parameter m37210m3-xxxsp/fp m37210m4-xxxsp m37211m2-xxxsp p0 p1 0 C p1 4 p1 5 C p1 7 p2 p3 0 , p3 1 p3 2 , p3 5 p4 0 , p4 1 p4 2 p5 p6 at crt display on at crt display off at stop mode rom ram rom ram rom ram i/o i/o input i/o i/o input i/o input output output functions 69 0.5 m s (the minimum instruction execution time, at 8mhz oscillation frequency) 8mhz 12 k bytes 256 bytes 16 k bytes 320 bytes 8 k bytes 192 bytes 8-bit 5 1 (can be used as n-channel open-drain output and pwm4-pwm7)(note) 5-bit 5 1 (cmos 3-state output) 3-bit 5 1 (can be used as a-d input) 8-bit 5 1 (cmos 3-state output) 2-bit 5 1 (cmos 3-state input/output) 4-bit 5 1 (can be used as timer input pins, int input pins and a-d input pins) 2-bit 5 1 (can be used as n-channel open-drain output and serial i/o function pins) 1-bit 5 1 (can be used as serial i/o and a-d input) 4-bit 5 1 (can be used as r, g, b, out pins) 4-bit 5 1 (can be used as n-channel open-drain output and pwm0-pwm3 output pins) 8-bit 5 1 8-bit timer 5 4 96 levels (max.) two external interrupts, four internal timer interrupts, one serial i/o interrupt, one crt interrupt, one f(x in )/4096 interrupt, one v sync interrupt, brk instruction built-in circuit (externally connected a ceramic resonator or a quartz-crystal oscillator) 5v 10% 110mw (at 4mhz oscillation frequency, v cc = 5.5v, typ.) 55mw (at 4mhz oscillation frequency, v cc = 5.5v, typ.) 1.65mw (max.) - 10 to 70c cmos silicon gate process 52-pin shrink plastic molded dip 64-pin plastic molded qfp 18 characters 5 2 lines : maximum 16 lines (by software) 12 5 16 dots 96 kinds 3 kinds 7 kinds max, (r, g, b) : can be specified by character unit 64 levels (horizontal) 5 128 levels (vertical) number of basic instructions instruction execution time clock frequency memory size input/output ports serial i/o timers subroutine nesting interrupt clock generating circuit power source voltage power dissipation operating temperature range device structure package crt display function note : the m37211m2-xxxsp can be also used as pwm4 and pwm5.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 5 pin description pin v cc , v ss cnv ss reset x in x out f p0 0 C p0 7 p1 1 C p1 4 p1 5 C p1 7 p2 0 C p2 7 p3 0 , p3 1 p3 2 C p3 5 p4 0 , p4 1 p4 2 p6 0 C p6 3 osc1, osc2 h sync v sync r, g, b, out d-a name power source voltage cnv ss reset input clock input clock output timing output i/o port p0 i/o port p1 input port p1 i/o port p2 i/o port p3 input port p3 i/o port p4 input port p4 output port p6 clock input for crt display clock output for crt display h sync input v sync input crt output da output input / output input input output output i/o i/o input i/o i/o input i/o input output input output input input output output functions apply voltage of 5v 10% to v cc , and 0v to v ss . this is connected to v ss . to enter the reset state, the reset input pin must be kept at a l for 2 m s or more (under nor- mal v cc conditions). if more time is needed for the crystal oscillator to stabilize, this l condition should be main- tained for the required time. this chip has an internal clock generating circuit. to control generating frequency, an exter- nal ceramic resonator or a quartz-crystal oscillator is connected between the x in and x out pins. if an external clock is used, the clock source should be connected the x in pin and the x out pin should be left open. this is the timing output pin. port p0 is an 8-bit i/o port with directional registers allowing each i/o bit to be individually programmed as input or output. at reset, this port is set to input mode. the output structure is cmos output. the output structure is n-channel open-drain output. when pwm4, pwm5, pwm6 and pwm7 are used, p0 0 , p0 1 , p0 2 and p0 3 are in common with pwm output pins of pwm4, pwm5, pwm6 and pwm7. ports p1 0 , p1 1 , p1 2 , p1 3 and p1 4 are 5-bit i/o ports and have basically the same functions as port p0. the output structure is cmos output. ports p1 5 , p1 6 and p1 7 are 3-bit input ports and they are in common with input pins of a-d comparator (a-d1, a-d2 and a-d3). port p2 is an 8-bit i/o port and has basically the same functions as port p0. the output structure is cmos output. ports p3 0 and p3 1 are 2-bit i/o ports and have basically the same functions as port p0. the output structure is cmos output. ports p3 2 , p3 3 , p3 4 and p3 5 are 4-bit input ports and ports p3 2 and p3 3 are in common with external clock input pins of timers 2 and 3. ports p3 4 and p3 5 are in common with external interrupt input pins int1 and int2. port p3 5 is in common with an input pin of a-d comparator (a-d4). ports p4 0 and p4 1 are 2-bit i/o ports and have basically the same functions as port p0. when serial i/o is used, ports p4 0 and p4 1 are in common with s out pin and s clk pin, re- spectively. port p4 2 is an 1-bit input port, and it is common with an input pin of a-d comparator (a-d5) and serial input pin (s in ). port p6 is an 4-bit output port. the output structure is n-channel open-drain. this port is in common with 6-bit pwm output pins pwm0-pwm3. this is the i/o pins of the clock generating circuit for the crt display function. this is the horizontal synchronizing signal input for crt display. this is the vertical synchronizing signal input for crt display. this is a 4-bit output pin for crt display. the output structure is cmos output. this is in common with port p5 2 C p5 5 . this is an output pin for 14-bit pwm.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 6 functional description central processing unit (cpu) the m37210m3-xxxsp/fp uses the standard 740 family instruction set. refer to the table of 740 family addressing modes and machine instructions or the series 740 software ? users manual for details on the instruction set. machine-resident 740 family instructions are as follows : the fst and slw instruction cannot be used. the mul, div, wit, and stp instruction can be used. cpu mode register the cpu mode register is allocated at address 00fb 16 . the cpu mode register contains the stack page selection bit. note : please beware of this bit when programming because it is set to 1 after the reset release. especially the internal ram of the m37211m2-xxxsp is in the zero page, so be sure to set this bit to 0. fig. 1 structure of cpu mode register 70 fix these bits to ?0 2 ? cpu mode register (cpum : address 00fb 16 ) stack page selection bit (note) 0 : zero page 1 : 1 page fix these bits to ?111 2 ? 0 0 1 1 1 1 1
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 7 fig. 2 memory map memory special function register (sfr) area the special function register (sfr) area in the zero page contains control registers such as i/o ports and timers. ram ram is used for data storage and for stack area of subroutine calls and interrupts. rom rom is used for sroring user programs as well as the interrupt vec- tor area. ram for display ram for display is used for specifing the character codes and colors to display. rom for display rom for display is used for storing character data. interrupt vector area the interrupt vector area contains reset and interrupt vectors. zero page the 256 bytes from addresses 0000 16 to 00ff 16 are called the zero page area. the internal ram and the special function registers (sfr) are allocated to this area. the zero page addressing mode can be used to specify memory and register addresses in the zero page area. access to this area with only 2 bytes is possible in the zero page addressing mode. special page the 256 bytes from addresses ff00 16 to ffff 16 are called the spe- cial page area. the special page addressing mode can be used to specify memory addresses in the special page area. access to this area with only 2 bytes is possible in the special page addressing mode. 0000 16 00bf 16 00ff 16 013f 16 017f 16 2000 16 20b1 16 3000 16 35ff 16 3800 16 3dff 16 ffde 16 ff00 16 ram (192 bytes) for m37211m2 ram (256 bytes) for m37210m3 rom for display (3 k bytes) rom (8 k bytes) for m37211m2 zero page special page sfr area not used not used not used not used interrupt vector area ? ? ? ? ? ? ? y ? ? ? ? ? ? ? t ? ? ? y ? ? ? t ? ? ? y ? ? ? t ? ? y ? ? t ? ? y ? ? t c000 16 d000 16 e000 16 ffff 16 ram for display (note) (72 bytes) ? ? y ? ? t ram (320 bytes) for m37210m4 rom (12 k bytes) for m37210m3 ? ? ? ? ? ? ? ? y ? ? ? ? ? ? ? ? t rom (16 k bytes) for m37210m4 ? ? ? ? ? ? ? ? ? ? y ? ? ? ? ? ? ? ? ? ? t ? ? y ? ? t ? ? y ? ? t ? ? y ? ? t ? ? y ? ? t note : refer to table 6. contents of crt display ram
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 8 fig. 3 memory map of special function register (sfr ) note : the m37211m2-xxxsp dose not have this register 00c1 16 00c0 16 00c2 16 00c3 16 00c4 16 00c5 16 00c6 16 00c7 16 00c8 16 00c9 16 00ca 16 00cb 16 00cc 16 00cd 16 00ce 16 00cf 16 00d0 16 00d1 16 00d2 16 00d3 16 00d4 16 00d5 16 00d6 16 00d7 16 00d8 16 00d9 16 00da 16 00db 16 00dc 16 00dd 16 00de 16 00df 16 port p1 port p2 port p3 port p4 port p5 port p5 control register port p6 port p6 directional register 14da-h register 14da-l register pwm1 register pwm0 register pwm3 register pwm4 register pwm output control register 1 pwm output control register 2 interrupt interval determination register interrupt interval determination control register serial i/o mode register serial i/o register port p0 port p0 directional register port p1 directional register port p2 directional register port p3 directional register port p4 directional register pwm2 register vertical position register 2 (block 2) character size register color register 0 color register 2 crt control register crt port control register a-d mode register a-d control register timer 2 timer 1 timer 4 timer 34 mode register pwm5 register pwm6 register (note) pwm7 register (note) cpu mode register interrupt request register 1 interrupt request register 2 interrupt control register1 interrupt control register2 horizontal position register vertical position register 1 (block 1) border selection register color register 1 color register 3 timer 3 timer 12 mode register 00e0 16 00e1 16 00e2 16 00e3 16 00e4 16 00e5 16 00e6 16 00e7 16 00e8 16 00e9 16 00ea 16 00eb 16 00ec 16 00ed 16 00ee 16 00ef 16 00f0 16 00f1 16 00f2 16 00f3 16 00f4 16 00f5 16 00f6 16 00f7 16 00f8 16 00f9 16 00fa 16 00fb 16 00fc 16 00fd 16 00fe 16 00ff 16
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 9 table 1. interrupt vector addresses and priority interrupt sources reset crt interrupt int 2 interrupt int 1 interrupt timer 4 interrupt f(x in )/4096 interrupt v sync interrupt timer 3 interrupt timer 2 interrupt timer 1 interrupt serial i/o interrupt brk instruction interrupt remarks non-maskable active edge selectable active edge selectable active edge selectable non-maskable software interrupt interrupts interrupts can be caused by 12 different sources consisting of 3 ex- ternal, 7 internal, 1 software, and reset. interrupts are vectored interrupts with priorities shown in table 1. re- set is also included in the table because its operation is similar to an interrupt. when an interrupt is accepted, the registers are pushed, interrupt disable flag i is set, and the program jumps to the address specified in the vector table. the interrupt request bit is cleared automatically. the reset can never be disabled. other interrupts are disabled when the interrupt disable flag is set. priority 1 2 3 4 5 6 7 8 9 10 11 12 vector addresses ffff 16 , fffe 16 fffd 16 , fffc 16 fffb 16 , fffa 16 fff9 16 , fff8 16 fff5 16 , fff4 16 fff3 16 , fff2 16 fff1 16 , fff0 16 ffef 16 , ffee 16 ffed 16 , ffec 16 ffeb 16 , ffea 16 ffe9 16 , ffe8 16 ffdf 16 , ffde 16 all interrupts except the brk instruction interrupt have an interrupt request bit and an interrupt enable bit. the interrupt request bits are in interrupt request registers 1 and 2 and the interrupt enable bits are in interrupt control registers 1 and 2. figure 4 shows the structure of the interrupt request registers 1 and 2 and interrupt control registers 1 and 2. interrupts other than the brk instruction interrupt and reset are ac- cepted when the interrupt enable bit is 1, interrupt request bit is 1, and the interrupt disable flag is 0. the interrupt request bit can be reset with a program, but not set. the interrupt enable bit can be set and reset with a program. reset is treated as a non-maskable interrupt with the highest priority. figure 5 shows interrupts control.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 10 fig. 5 interrupt control fig. 4 structure of interrupt-related registers interrupt request bit interrupt enable bit interrupt disable flag (i) brk instruction reset interrupt request int 1 interrupt enable bit int 2 interrupt enable bit serial i/o1 interrupt enable bit fix this bit to ? f(x in )/4096 interrupt enable bit fix these bits to ? 70 timer 1 interrupt request bit timer 2 interrupt request bit timer 3 interrupt request bit timer 4 interrupt request bit crt interrupt request bit v sync interrupt request bit interrupt request register 1 (ireq1 : address 00fc 16 ) 70 int 1 interrupt request bit int 2 interrupt request bit serial i/o1 interrupt request bit f(x in )/4096 interrupt request bit fix this bit to ? interrupt request register 2 (ireq2 : address 00fd 16 ) 70 timer 1 interrupt enable bit timer 2 interrupt enable bit timer 3 interrupt enable bit timer 4 interrupt enable bit crt interrupt enable bit v sync interrupt enable bit fix these bits to ? interrupt control register 1 (icon1 : address 00fe 16 ) 70 interrupt control register 2 (icon2 : address 00ff 16 ) 0 : no interrupt request issued 1 : interrupt request issued 0 : interrupt disabled 1 : interrupt enabled 0 000 00
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 11 fig. 6 structure of timer-related registers timers the m37210m3-xxxsp has 4 timers: timer 1, timer 2, timer 3 a nd timer 4. all timers are 8-bit timers with the 8-bit timer la tch. the timer block diagram is shown in figure 7. all of the timers count down and their divide ratio is 1/(n+ 1), where n is the value of timer latch. the value is set to a timer at the same time by writing a count value to the corresponding timer latch (a ddresses 00f0 16 to 00f3 16 : timers 1 to 4). the count value is decremented by 1. the timer interrupt req uest bit is set to 1 by an timer overflow at the next count pulse a fter the count value reaches 00 16. (1) timer 1 timer 1 can select one of the following count sources: f(x in )/16 f(x in )/4096 the count source of timer 1 is selected by setting bit 0 of the timer 12 mode register (address 00f4 16 ). timer 1 interrupt request occurs at timer 1 overflow. (2) timer 2 timer 2 can select one of the following count sources: f(x in )/16 timer 1 overflow signal external clock from the p3 2 /tim2 pin the count source of timer 2 is selected by setting bits 4 an d 1 of the timer 12 mode register (address 00f4 16 ). when timer 1 overflow signal is a count source for the timer 2, the timer 1 functi ons as an 8- bit prescaler. timer 2 interrupt request occurs at timer 2 overflow. (3) timer 3 timer 3 can select one of the following count sources: f(x in )/16 external clock from the p3 3 /tim3 pin and the h sync pin the count source of timer 3 is selected by setting bits 5 an d 0 of the timer 34 mode register (address 00f5 16 ). timer 3 interrupt request occurs at timer 3 overflow. (4) timer 4 timer 4 can select one of the following count sources: f(x in )/16 f(x in )/2 timer 3 overflow signal the count source of timer 3 is selected by setting bits 4 an d 1 of the timer 34 mode register 2 (address 00f5 16 ). when timer 3 overflow signal is a count source for the timer 4, the timer 3 functi ons as an 8- bit prescaler. timer 4 interrupt request occurs at timer 4 overflow. at reset, timers 3 and 4 are connected by hardware and ff 16 is automatically set in timer 3; 07 16 in timer 4. the f(x in )/16 is se- lected as the timer 3 count source. the internal reset is re leased by timer 4 overflow at these state, the internal clock is conne cted . at execution of the stp instruction, timers 3 and 4 are conn ected by hardware and ff 16 is automatically set in timer 3; 07 16 in timer 4. however, the f(x in )16 is not selected as the timer 3 count source. so set bit 0 of the timer 34 mode register (address 00f5 16 ) to 0 before the execution of the stp instruction (f(x in )16 is selected as the timer 3 count source). the internal stp state is released by timer 4 over- flow at these state, the internal clock is connected . because of this, the program starts with stable clock. the structure of timer-related registers is shown in figure 6. timer 2 internal count source selection bit 0 : f (x in ) /16 1 : timer 1 overflow signal timer 2 count stop bit 0 : operation 1 : stop timer 1 count stop bit 0 : operation 1 : stop timer 2 count source selection bit 0 : internal clock source 1 : external clock source from p3 2 /tim2 pin timer 1 count source selection bit 0 : f (x in ) /16 1 : 1024 m s clock timer 12 mode register (tm12mr : address 00f4 16 ) 70 timer 3 count source selection bit 0 : f (x in ) /16 1 : external clock source (bits) timer 34 mode register (tm34mr : address 00f5 16 ) timer 4 internal count source selection bit 0 : timer 3 overflow signal 1 : f (x in ) /16 timer 3 count stop bit 0 : operation 1 : stop timer 4 count stop bit 0 : operation 1 : stop timer 4 count source selection bit 0 : internal clock source 1 : f (x in ) /2 70 timer 3 external count source selection bit 0 : p3 3 /tim3 pin input 1 : h sync pin input fix this bit to 0
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 12 fig. 7 timer block diagram notes 1 : h pulse width of external clock inputs tim2 and tim3 needs 4 machine cycles or more. 2 : when the external clock source is selected, timers 2 and 3 are counted at a rising edge of input signal. 3 : in the stop mode or the wait mode, external clock inputs tim2 and tim3 cannot be used. 8 8 8 data bus x in 1/2 1/8 timer 1 latch (8) timer 1 (8) timer 2 latch (8) timer 2 (8) 8 8 8 d.f. d.f. 8 8 timer 3 latch (8) timer 3 (8) t12m 0 t12m 2 t12m 4 t12m 1 t12m 3 t34m 0 t34m 2 t34m 1 timer 4 latch (8) timer 4 (8) 8 p3 2 /tim2 p3 3 /tim3 timer 1 interrupt request t34m 4 t34m 3 07 16 8 8 8 timer 2 interrupt request timer 3 interrupt request reset stp instruction timer 4 interrupt request ff 16 h sync t34m 5 selection gate : connected to black colored side at reset. ? ? ? ? t ? ? ? ? t 1/4096 t12m : timer 12 mode register t34m : timer 34 mode register
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 13 fig. 8 serial i/o block diagram serial i/o m37210m3-xxxsp has a serial i/o. a block diagram of the serial i/o is shown in figure 8. synchronous input/output clock (s clk ), and the serial i/o pins (s out , s in ) are used as port p4. the serial i/o mode registers (address 00dc 16 ) are 8-bit registers. bits 0, 1 and 2 of these registers are used to select a synchronous clock source. bit 3 decides whether parts of p4 will be used as a serial i/o or not. to use p4 2 as a serial input, set the directional register bit which cor- responds to p4 2 to 0. for more information on the directional regis- ter, refer to the i/o pin section. the serial i/o function is discussed below. the function of the serial i/o differs depending on the clock source ; external clock or internal clock. data bus x in 8 1/2 1/2 p4 1 latch p4 1 /s clk sm 3 p4 0 latch sm 3 p4 0 /s out p4 2 /s in sm 2 sm 1 sm 0 1/4 1/8 1/16 frequency divider serial i/o counter (8) sm 5 : lsb ? msb serial i/o shift register (8) (address 00dd 16 ) serial i/o interrupt request synchronization circuit sm 6 selection gate : connected to black colored side at reset. ? ? ? ? t ? ? ? ? t
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 14 fig. 9 serial i/o timing (for lsb first) the serial i/o counter is set to 7 when data is stored in the serial i/o register. at each falling edge of the transfer clock, serial data is out- put to s out . during the rising edge of this clock, data can be input from s in and the data in the serial i/o register will be shifted 1 bit. transfer direction can be selected by bit 5 of serial i/o mode register. after the transfer clock has counted 8 times, the serial i/o register will be empty and the transfer clock will remain at a high level. at this time the interrupt request bit will be set. external clock- if an external clock is used, the interrupt request will be sent after the transfer clock has counted 8 times but transfer clock will not stop. due to this reason, the external clock must be controlled from the outside. the external clock should not exceed 1mhz at a duty cycle of 50%. the timing diagram is shown in figure 9. when using an ex- ternal clock for transfer, the external clock must be held at h level when the serial i/o counter is initialized. when switching between the internal clock and external clock, the switching must not be per- formed during transfer. also, the serial i/o counter must be initialized after switching. notes 1: on programming, note that the serial i/o counter is set by writing to the serial i/o register with the bit managing in- structions as seb and clb instructions. 2: when an external clock is used as the synchronizing clock, write transmit data to the serial i/o register at h of the transfer clock input level. d 0 d 1 d 2 d 3 d 4 d 5 d 6 d 7 (note 1) interrupt request bit set sync. clock transfer clock serial i/o register write signal serial i/o output s out serial i/o input s in notes 1 : if internal clock is selected, the sout pin is at high impedance after transfer is completed. 2 : when an external clock is used as the synchronous clock, write the transmit data to the serial i/o shift register at h of the transfer clock input level.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 15 fig. 10 structure of serial i/o mode register serial i/o common transmission/reception mode. write 1 to bit 6 of serial i/o mode register, and signals s in and s out switch internal to be able to serial data transmission/reception. figure 11 shows signals on serial i/o common transmission/recep- tion mode. note : receive the serial data after writing ff 16 to the serial i/o register. fig. 11 signals on serial i/o common transmission/reception mode 70 internal synchronous clock selection bits 00 : f (x in ) /4 01 : f (x in ) /16 10 : f (x in ) /32 11 : f (x in ) /64 serial l/o mode register (sm : address 00dc 16 ) synchronous clock selection bit 0 : external clock 1 : internal clock fix this bit to ?? serial l/o port selection bit 0 : p4 0, p4 1 1 : s out1 ,s clk signal output pins transfer direction selection bit 0 : lsb first 1 : msb first serial input pin selection bit 0 : input from s in pin 1 : input from s out pin serial i/o shift register p4 1 /s clk p4 0 /s out ( /in ) p4 2 /s in clock1 input or output the transmission mode sm 6 port p4 2 data ?? the reception mode ??
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 16 within one period in the circuit internal section. refer to figure 13 (a). six different pulses can be output from the pwm. these can be selected by bits 0 through 5. depending on the content of the 6-bit pwm latch, pulses from 5 to 0 are selected. the pwm output is the difference of the sum of each of these pulses. several examples are shown in figure 13 (b). changes in the contents of the pwm latch allows the selection of 64 lengths of high-level area outputs varying from 0/64 to 63/64. a length of entirely high-level output cannot be output, i.e. 64/64. (5) 14-bit pwm operation the output example of the 14-bit pwm is shown in figure 14. the 14-bit pwm divides the data within the pwm latch into the lower 6 bits and higher 8 bits. a high-level area within a length d h times t is output every short area of t = 256 t =128 m s as determined by data d h of the higher 8 bits. thus, the time for the high-level area is equal to the time set by the lower 8 bits or that plus t . as a result, the short-area period t ( = 128 m s, approx. 7.8 khz) becomes an approximately repeti- tive period. (6) output after reset at reset the output of port p6 is in the high impedance state and the contents of the pwm register and latch are undefined. note that after setting the pwm register, its data is transferred to the latch. table 2. relation between the low-order 6 bits of data and high-level area increase space 6 low-order bits of data 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 lsb area longer by t than that of other t m (m = 0 to 63) nothing m = 32 m = 16, 48 m = 8, 24, 40, 56 m = 4, 12, 20, 28, 36, 44, 52, 60 m = 2, 6, 10, 14, 18, 22, 26, 30, 34, 38, 42, 46, 50, 54, 58, 62 m = 1, 3, 5, 7, ................................................... 57, 59, 61, 63 pwm output circuit (1) introduction the m37210m3-xxxsp/fp and m37210m4-xxxsp are equipped with one 14-bit pwm (da) and eight 6-bit pwms (pwm0-pwm7), and the m37211m2-xxxsp is equipped with six 6-bit pwms (pwm0-pwm5). the 14-bit resolution gives da the minimum resolution bit width of 500ns (for f(x in ) = 4mhz) and a repeat period of 8192 m s. pwm0-pwm7 have a 6-bit reso- lution with minimum resolution bit width of 16 m s and repeat pe- riod of 1024 m s. block diagram of the pwm is shown in figure 16. the pwm timing generator section applies individual control signals to da and pwm0-7 using clock input x in divided by 2 as a reference signal. (2) data setting the output pins pwm0-3 are in common with port p6 and pwm4-7 are in common with port p0 0 -p0 3 . for pwm output, each pwm output selection bit (bit 1 to 7 of pwm output control register 1, bit 0, 1 of pwm output control register 2, should be set. when da is used for output, first set the higher 8-bit of the da-h register (address 00ce 16 ), then the lower 6-bit of the da-l register (address 00cf 16 ). when one of the pwm0-7 is used for output, set the 6-bit in the pwm0-7 register (address 00d0 16 to 00d4 16 , 00f6 16 to 00f8 16 ), respectively. (3) transferring data from registers to pwm circuit the data written to the pwm registers. 8 bits of the da-h regis- ter is transferred to 14-bit pwm circuit when writing to lower 6 bits of the da-l register. (4) operation of the 6-bit pwms the timing diagram of the eight 6-bit pwms (pwm0-7) is shown in figure 13. one period (t) is composed of 64 (2 6 ) segments. there are six different pulse types configured from bits 0 to 5 representing the significance of each bit. these are output
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 17 fig. 12 pwm block diagram note : the m37211m2-xxxsp can not output the pwm. pw : pwm output control register 1 pn : pwm output control register 2 d0 : port p0 direction register p0 : port p0 d6 : port p6 directional register p6 : port p6 inside of is as same contents with the others. data bus pwm0 register (address 00d0 16 ) 8 pn 3 p6 0 d6 0 pw 2 pwm0 selection gate : connected to black colored side at reset. p6 1 d6 1 pw 3 pwm1 p6 2 d6 2 pw 4 pwm2 p6 3 d6 3 pw 5 pwm3 p0 0 d0 0 pw 6 pwm4 p0 1 d0 1 pw 7 pwm5 p0 2 d0 2 pn 0 pwm6(note) p0 3 d0 3 pn 1 pwm7(note) timing generator for pwm 1/2 pw 0 6-bit pwm circuit pn 2 14-bit pwm circuit pn 4 da d-a pw 1 x in bit 5 msb lsb 6 8 bit 7 bit 0 bit 0 da-h register (address 00ce 16 ) (14-bit) da-l register (address 00cf 16 ) 6 14 pass gate ? ? ? ? ? ? t ? ? ? ? ? ? t
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 18 fig. 13 6-bit pwm timing 2 6 10 14 18 22 26 30 34 38 42 46 50 54 58 62 13579 1 9 3 9 5 9 8 4 1 22 02 83 64 45 26 0 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 00 16 (0) 01 16 (1) 06 16 (24) 3f 16 (63) 16 48 32 (a) pulses showing the weight of each bit t = 64t pwm output t = 10 m s t = 1024 m s f (x in ) = 4mhz (b) example of 6-bit pwm output 24 40 56
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 19 fig. 14 14-bit pwm output example (f (x in ) = 4mhz) set 2c 16 to da-h register set 28 16 to da-l register [da-h register] [da latch] bit 7 these bits decide smaller intervals tm in which h level area is [h level area of fundamental waveform plus r] these bits decide h level area of fundamental waveform fundamental waveform 14-bit 8-bit counter pwm output 00 1011 00 bit 0 after writing of da-l after writing bit 13 bit 0 00 1011 00101 00 0 10 0 10 0 bit 0 waveform of smaller intervals tm specified by the lower 6 bi ts 14-bit pwm output 8-bit counter ff fe fd d6 d5 d4 d3 02 01 00 the fundamental waveform of smaller intervals tm which is not specified by the lower 6 bits is not changed 14-bit pwm output low-order 6-bit output of da latch t 0 t 1 t 2 t 3 t 4 t 5 t 59 t 60 t 61 t 62 t 63 () h level area of fundamental waveform minimum bit durations 0.5 m s high-order 8 bit value of da latch = 5 () ( 0.5 m s 5 44 0.5 m s 5 45 0.5 m s 2c 2b 2a 03 02 01 ff fe fd d6 d5 d4 d3 02 01 00 2c 2b 2a 03 02 01 00 ) 0.5 m s 5 45 t = 8192 m s [da-l register] 00 t = 0.5 m s
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 20 fig.15 structure of pwm output control registers 1 and 2 note : fix this bit to 0 (m37211m2-xxxsp). pwm output control register 2 (pn : address 00d6 16 ) p0 0 /pwm4 output selection bit 0 : p0 0 (general-purpose) output 1 : pwm4 (6-bit pwm) output p6 3 /pwm3 output selection bit 0 : p6 3 (general-purpose) output 1 : pwm3 (6-bit pwm) output p6 2 /pwm2 output selection bit 0 : p6 2 (general-purpose) output 1 : pwm2 (6-bit pwm) output p6 1 /pwm1 output selection bit 0 : p6 1 (general-purpose) output 1 : pwm1 (6-bit pwm) output p6 0 /pwm0 output selection bit 0 : p6 0 (general-purpose) output 1 : pwm0 (6-bit pwm) output d-a pin general-purpose output register 0 : output ?? 1 : output ?? 70 da, pwm count source stop bit 0 : supply 1 : stop pwm output control register 1 (pw : address 00d5 16 ) da/pn 4 output selection bit 0 : da (14-bit pwm) output 1 : pn 4 (general-purpose) output 70 p0 1 /pwm5 output selection bit 0 : p0 1 (general-purpose) output 1 : pwm5 (6-bit pwm) output p0 2 /pwm6 output selection bit (note) 0 : p0 2 (general-purpose) output 1 : pwm6 (6-bit pwm) output p0 3 /pwm7 output selection bit (note) 0 : p0 3 (general-purpose) output 1 : pwm7 (6-bit pwm) output da output polarity selection bit 0 : positive polarity 1 : negative polarity 6-bit pwm output polarity selection bit 0 : positive polarity 1 : negative polarity
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 21 fig. 18 a-d comparator block diagram fig. 17 structure of a-d mode register fig. 16 structure of a-d control register table 3. relationship between the contents of a-d control register and reference voltage a-d control register reference voltage vref 1/64 v cc 3/64 v cc 5/64 v cc 27/64 v cc 29/64 v cc 31/64 v cc bit4 0 0 0 1 1 1 bit 3 0 0 0 1 1 1 bit 2 0 0 0 1 1 1 bit 1 0 0 1 0 1 1 bit 0 0 1 0 1 0 1 70 a-d input pin selection bits 0 0 0 : a-d1 0 0 1 : a-d2 0 1 0 : a-d3 0 1 1 : a-d4 1 0 0 : a-d5 a-d mode regiser (adm : address 00ee 16 ) 1 0 1 : 1 1 0 : 1 1 1 : these are not available ? y ? t a-d mode register bits 0 to 2 p1 5 /a-d1 analog signal switch comparator bit 4 bit 3 bit 2 bit 1 bit 0 switch tree resistor ladder a-d control register data bus bit 5 comparator control p1 6 /a-d2 p1 7 /a-d3 p3 5 /a-d4 p4 2 /a-d5 70 d-a converter set bits (refer to table 3) a-d control register (adc : address 00ef 16 ) strage bit of comparison result 0 : input voltage < reference voltage 1 : input voltage > reference voltage a-d comparator block diagram of a-d comparator is shown in figure 18. a-d com- parator consists of 5-bit d-a converter and comparator. the a-d con- trol register can generate 1/64 v cc -step internal analog voltage based on the settings of bits 0 to 4. table 3 gives the relation between the descriptions of a-d control register bits 0 to 4 and the generated internal analog voltage. the comparison result of the analog input voltage and the internal analog voltage is stored in the a-d control register, bit 5. after selection of an analog input pin by bits 0-2 of a-d mode register (address 00ee 16 ), the digital value corresponding to the internal ana- log voltage to be compared is then written in the a-d control register, bit 0 to 3 and an analog input pin is selected. after 16 machine cycle, the voltage comparison is completed.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 22 12 dots 16 dots functions 18 characters 5 2 lines 12 5 16 dots (refer to figure 19) 96 3 kinds 1 screen : 4 kinds a character possible (multiline display) possible (maximum 7 kinds) crt display functions (1) outline of crt display functions table 4 outlines the crt display functions of the m37210m3-xxxsp. the m37210m3-xxxsp incorporates a 18 columns 5 2 lines crt display control circuit. crt display is controlled by the crt display control register. up to 96 kinds of characters can be displayed, and colors can be specified for each character. four colors can be displayed on one screen. a combination of up to 7 colors can be obtained by using each output signal (r, g and b). characters are displayed in a 12 5 16 dot configuration to obtain smooth character patterns (refer to figure 19). the following shows the procedure how to display characters on the crt screen. fig. 19 crt display character configuration fig. 20 structure of crt control register set the character to be displayed in display ram. set the display color by using the color register. a specify the color register in which the display color is set by us- ing the display ram. ? specify the vertical position and character size by using the verti- cal position register and the character size register. ? specify the horizontal position by using the horizontal position register. ? write the display enable bit to the designated block display flag of the crt control register. when this is done, the crt starts op- eration according to the input of the v sync signal. the crt display circuit has an extended display mode. this mode allows multiple lines (more than 3 lines) to be displayed on the screen by interrupting the display each time one line is dis- played and rewriting data in the block for which display is terminated by software. figure 21 shows a block diagram of the crt display control circuit. figure 20 shows the structure of the crt display control register. table 4. outline of crt display functions parameter number of display character character configuration kinds of character character size color display expansion raster coloring kinds of color coloring unit note : display is controlled by logical product (and) between the all- blocks display control bit and each block display control bit 70 crt control register (cc : address 00ea 16 ) display of all blocks control bit (note) 0 : display of all blocks off 1 : display of all blocks on display of block 1 control bit 0 : display of block 1 off 1 : display of block 1 on display of block 2 control bit 0 : display of block 2 off 1 : display of block 2 on
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 23 fig. 21 block diagram of crt display control circuit (address 00ea 16 ) crt control register ( addresses 00e1 16 to 00e2 16 ) vertical position registers (address 00e4 16 ) character size register (address 00e0 16 ) horizontal position register (address 00e5 16 ) border selection register (addresses 00e6 16 to 00e9 16 ) color registers (address 00ec 16 ) crt port control register data bus r g b out output circuit shift register 12 bits shift register 12 bits rom for display 12 bits 16 96 display control circuit display position control circuit display oscillation circuit osc1 osc2 h sync v sync ram for display 9 bits 18 2
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 24 fig. 23 structure of horizontal position register (2) display position the display positions of characters are specified in units called a block. there are two blocks, block 1 and block 2. up to 18 characters can be displayed in one block (refer to (4) memory for display). the display position of each block in both horizontal and vertical di- rections can be set by software. the horizontal direction is common to all blocks, and is selected from 64-step display positions in units of 4tc (tc = oscillating cycle for dis- play). the display position in the vertical direction is selected from 128-step display positions for each block in units of four scanning lines. block 2 is displayed after the display of block 1 perfectly (fig. 24(a)). then if the display of block 2 starts during the display of block 1, only block 1 is displayed. as same, when multiline display, block 1 is dis- played after the display of block 2 perfectly (fig. 24(b)). the vertical position can be specified from 128-step positions (four scanning lines per step) for each block by setting values 00 16 to 7f 16 to bits 0 to 6 in the vertical position register (addresses 00e1 16 and 00e2 15 ). figure 22 shows the structure of the vertical position regis- ter. the horizontal direction is common to all blocks, and can be speci- fied from 64-step display positions (4tc per step (tc = oscillating cycle for display) by setting values 00 16 to 3f 16 to bits 0 to 5 in the horizontal position register (address 00e0 16 ). figure 23 shows the structure of the horizontal position register. fig. 22 structure of vertical position registers 70 vertical position registers 1, 2 (cv1 : address 00e1 16 ) (cv2 : address 00e2 16 ) the vertical display start positions 128-step positions (00 16 to 7f 16 ) 70 horizontal position register (hr : address 00e0 16 ) the horizontal display start positions 64-step positions (00 16 to 3f 16 )
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 25 fig. 24 display position block 2 (a) example when each block is separated (b) example when block 2 overlaps with block 1 (rh) cv 1 cv 2 block 1 block 2 cv 1 cv 2 block 1 block 1 (second) cv 1 no display no display
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 26 (3) character size the size of characters to be displayed can be selected from three sizes for each block. use the character size register (address 00e4 16 ) to set a character size. the character size in block 1 can be specified by using bits 0 and 1 in the character size register ; the character size in block 2 can be specified by using bits 2 and 3. fig- ure 25 shows the structure of the character size register. the character size can be selected from three sizes : small size, me- dium size and large size. each character size is determined by the number of scanning lines in the height (vertical) direction and the cycle of display oscillation ( = tc) in the width (horizontal) direction. the small size consists of [one scanning line] 5 [1 tc] ; the medium size consists of [two scanning lines] 5 [2 tc] ; and the large size con- sists of [three scanning lines] 5 [3 tc]. table 5 shows the relationship between the set values in the charac- ter size register and the character sizes. table 5. the relationship between the set values of the character size register and the character sizes set values of the character size register csn 0 0 1 0 1 csn 1 0 0 1 1 character size minimum medium large width (horizontal) direction tc : oscillating cycle for display 1 tc 2 tc 3 tc this is not available height (vertical) direction scanning lines 1 2 3 fig. 25 structure of character size register note : the display start position in the horizontal direction is not affected by the character size. in other words, the horizontal display start position is common to all blocks even when the character size varies with each block (refer to figure 26). 70 character size of block 1 selection bits 00 : minimum size 01 : medium size 10 : large size 11 : this is not available character size register (cs : address 00e4 16 ) character size of block 2 selection bits 00 : minimum size 01 : medium size 10 : large size 11 : this is not available
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 27 contained up address of character data left 8 dots lines 3000 16 to 300f 16 3010 16 to 301f 16 3020 16 to 302f 16 3030 16 to 303f 16 : 3100 16 to 310f 16 3110 16 to 311f 16 : 34f0 16 to 34ff 16 3500 16 to 350f 16 : 35d0 16 to 35df 16 35e0 16 to 35ef 16 35e0 16 to 35ff 16 right 4 dots lines 3800 16 to 380f 16 3810 16 to 381f 16 3820 16 to 382f 16 3830 16 to 383f 16 : 3900 16 to 390f 16 3910 16 to 391f 16 : 3cf0 16 to 3cff 16 3d00 16 to 3d0f 16 : 3dd0 16 to 3ddf 16 3de0 16 to 3def 16 3df0 16 to 3dff 16 character code 00 16 01 16 02 16 03 16 : 10 16 11 16 : 4f 16 50 16 : 5d 16 5e 16 5f 16 table 6. character code list the crt display rom has a capacity of 3k bytes. because 32 bytes are required for one character data, the rom can contain up to 96 kinds of characters. the crt display rom space is broadly divided into two areas. the [vertical 16 dots] [horizontal (left side) 8 dots] data of display char- acters are stored in addresses 3000 16 to 35ff 16 ; the [vertical 16 dots] [horizontal (right side) 4 dots] data of display characters are stored in addresses 3800 16 to 3dff 16 (refer to figure 27). note how- ever that the four upper bits in the data to be written to addresses 3800 16 to 3dff 16 must be set to 1 (by writing data f0 16 to ff 16 ). fig. 26 display start position of each character size (horizontal direction) minimum medium large horizontal display start position (4) memory for display there are two types of memory for display : rom of crt display (ad- dresses 3000 16 to 35ff 16 , 3800 16 to 3dff 16 ) used to store charac- ter dot data (masked) and display ram (addresses 2000 16 to 20b1 16 ) used to specify the colors of characters to be displayed. the following describes each type of display memory. rom for display (addresses 3000 16 to 35ff 16 and 3800 16 to 3dff 16 ) the crt display rom contains dot pattern data for characters to be displayed. for characters stored in this rom to be actually dis- played, it is necessary to specify them by writing the character code inherent to each character (code determined based on the ad- dresses in the crt display rom) into the crt display ram.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 28 the character code used to specify a character to be displayed is determined based on the address in the crt display rom in which that character is stored. assume that data for one character is stored at addresses 3xx0 16 to 3xxf 16 (xx denotes 00 16 to 5f 16 ) and addresses 3yy0 16 to 3yyf 16 (yy denotes 80 16 to df 16 ), then the character code for it is xx16. in other words, character code for any given character is configured with two middle digits of the four-digit (hexnotated) addresses 3000 16 to 35ff 16 where data for that character is stored. table 6 lists the character codes. fig. 27 display character stored area bit 7 bit 0 bit 7 bit 3 bit 0 3xx0 16 + 800 16 3xxf 16 + 800 16 3xx0 16 00000000 0 0 1 0 0 0 0 0 0 0 00 010 0 0 1 0 1 0 0 00 0 0 00 1010 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 0 0 1 0 0 10 0 0 00 1 0 0 1 0 0 00000 0 01 000 0 01 00 000 000 0 1 0 00 0 0000 00000 0 00 3xxf 16 11110000 0 0 0 0 1 1 1 1 1 1 10 100 0 0 0 0 0 1 1 11 1 1 11 0000 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 1 0 0 0 0 1 1 1 1 1 1 11 0 0 10 0 0 0 1 1 1 1 1 1 1 1 11000 10100 1 11 101 1 11 00 101 100 1 1 1 10 1 1000 10000 1 11 00000 1 1 1 1 1
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 29 ram for display (address 2000 16 to 20b1 16 ) the crt display ram is allocated at addresses 2000 16 to 20b1 16 , and is divided into a display character code specifying part and dis- play color specifying part for each block. table 7 shows the contents of the crt display ram. when a character is to be displayed at the first character (leftmost) position in block 1, for example, it is necessary to write the character code to the seven low-order bits (bits 0 to 6) in address 2000 16 and the color register no. to the two low-order bits (bits 0 and 1) in ad- dress 2080 16 . the color register no. to be written here is one of the four color registers in which the color to be displayed is set in ad- vance. for details on color registers, refer to (5) color registers. the structure of the crt display ram is shown in figure 27. table 7. the contents of the crt display ram block block 1 block 2 display position (from left) 1st character 2nd character 3rd character : 16th character 17th character 18th character 1st character 2nd character 3rd character : 16th character 17th character 18th character color specification 2080 16 2081 16 2082 16 : 208f 16 2090 16 2091 16 2092 16 : 209f 16 20a0 16 20a1 16 20a2 16 : 20af 16 20b0 16 20b1 16 20b2 16 : 20bf 16 character code specification 2000 16 2001 16 2002 16 : 200f 16 2010 16 2011 16 2012 16 : 201f 16 2020 16 2021 16 2022 16 : 202f 16 2030 16 2031 16 2032 16 : 203f 16 not used not used
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 30 fig. 28 structure of the crt display ram 70 character code (00 16 to 5f 16 ) specify 96 characters 10 specify color select mode 00 : color register 0 specification 01 : color register 1 specification 10 : color register 2 specification 11 : color register 3 specification 70 character code (00 16 to 5f 16 ) specify 96 characters 10 color register specification 00 : color register 0 specification 01 : color register 1 specification 10 : color register 2 specification 11 : color register 3 specification block 1 [color specification] 1st character : 2080 16 to 18th character : 2091 16 block 2 [character specification] 1st character : 2020 16 to 18th character : 2031 16 [color specification] 1st character : 20a0 16 to 18th character : 20b1 16 [character specification] 1st character : 2000 16 to 18th character : 2011 16
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 31 (5) color registers the color of a displayed character can be specified by setting the color to one of the four color registers (co0 to co3 : addresses 00e6 16 to 00e9 16 ) and then specifying that color register with the crt display ram. there are three color outputs : r, g and b. by using a combination of these outputs, it is possible to set 2 3 -1 (when no output) = 7 col- ors. however, because only four color registers are available, up to four colors can be displayed at one time. r, g and b outputs are set by using bits 1 to 3 in the color register. bit 5 is used to specify whether a character output or blank output. figure 29 shows the structure of the color register. (6) multiline display the m37210m3-xxxsp can normally display two lines on the crt screen by displaying two blocks at different vertical positions. in addition, it allows up to 16 lines to be displayed by using a crt interrupt. the crt interrupt works in such a way that when display of one block is terminated, an interrupt request is generated. in other words, character display for a certain block is initiated when the scanning line reaches the display position for that block (speci- fied with vertical position register) and when the range of that block is exceeded, an interrupt is applied. note : a crt interrupt does occurs at the end of display regardless of display on or off. in other words, even if a block is set to off display with the display control bit of the crt control register (address 00ea 16 ), a crt interrupt request occurs (refer to figure 30). fig. 29 structure of color registers note : when the character bordering function is used, the contents of this bit (bit 5) are invalied, and the out pin output be- comes a border output. color registers 0,1,2,3 (co0 : address 00e6 16 ) (co1 : address 00e7 16 ) (co2 : address 00e8 16 ) (co3 : address 00e9 16 ) 70 b signal output selection bit 0 : no character is output 1 : character is output out signal output selection bit (note) 0 : out pin outputs character 1 : out pin outputs blank g signal output selection bit 0 : no character is output 1 : character is output r signal output selection bit 0 : no character is output 1 : character is output
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 32 fig. 30 timing of crt interrupt (note) : that is to say, crt interrupt occurs even when it is off display by setting the display control flag of the crt control register (address 00ea 16 ). block 2?(on display) block 1?(on display) block 2 (on display) block 1 (on display) ?rt interrupt? ?rt interrupt? ?rt interrupt? ?rt interrupt? on display (?rt interrupt?works after block) block 2?(off display) block 1?(off display) block 2 (off display) block 1 (off display) ?rt interrupt? ?rt interrupt? ?rt interrupt? ?rt interrupt? off display (?rt interrupt?occurs after block)
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 33 (7) character border function an border of a one clock (one dot) equivalent size can be added to a character to be displayed in both horizontal and vertical directions. the border is output from the out pin. in this case, bit 5 in the color register (contents output from the out pin) is nullified, and the bor- der is output from the out pin instead. fig. 31 example of border fig. 32 structure of border selection register border can be specified in units of block by using the border select register (address 00e5 16 ). table 8 shows the relationship between the values set in the border select register and the character border function. figure 32 shows the structure of the border select register. is border. is display by character data. table 8. the relationship between the value set in the border selection register and the character border function border selection register mdn0 0 1 functions ordinary border including character example of output r, g, b output out output r, g, b output out output 70 border selection register (md : address 00e5 16 ) block 1 out signal output border selection bit 0 : same output as r, g, b is output 1 : border output block 2 out signal output border selection bit 0 : same output as r, g, b is output 1 : border output
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 34 (8) crt output pin control crt output pins r, g, b and out are respectively shared with port p5 2 , p5 3 , p5 4 and p5 5 . when the corresponding bits in the port p5 control register (address 00cb 16 ) are cleared to 0, the pins are set for crt output ; when the bits are set to 1, the pins function as port p5 (general- purpose output pins). the polarities of crt outputs (r, g, b and out, as well as h sync and v sync ) can be specified by using the crt port control register (address 00ec 16 ). use bits 0 to 4 in the crt port control register to set the output po- larities of h sync , v sync , r/g/b and out. when these bits are cleared to 0, a positive polarity is selected ; when the bits are set to 1, a negative polarity is selected. bits 5 to 7 in the crt port control register are used to specify pin by pin whether normal video signals or r-mute, g-mute, and b- mute signals are output from each pin (r, g, b). when set for r- mute, g-mute, and b-mute outputs, the whole background colors of the screen become red, green, and blue. figure 33 shows the structure of the crt port control register. fig. 33 structure of crt port control register 70 h sync input polarity selection bit 0 : positive polarity 1 : negative polarity polarity register (crtp : address 00ec 16 ) v sync input polarity selection bit 0 : positive polarity 1 : negative polarity out output polarity selection bit 0 : positive polarity 1 : negative polarity r pin output switch bit 0 : r signal output 1 : r-mute signal output g pin output switch bit 0 : g signal output 1 : g-mute signal output r/g/b output polarity selection bit 0 : positive polarity 1 : negative polarity b pin output switch bit 0 : b signal output 1 : b-mute signal output
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 35 interrupt interval determination function the m37210m3-xxxsp incorporates an interrupt interval determina- tion circuit. this interrupt interval determination circuit has an 8-bit binary up counter as shown in figure 34. using this counter, it determines an interval or a pulse width on the int1 or int2 (refer to figure 36). the following describes how the interrupt interval is determined. 1. the interrupt input to be determined (int1 input or int2 input) is selected by using bit 2 in the interrupt interval determination con- trol register (address 00d8 16 ). when this bit is cleared to 0, the int1 input is selected ; when the bit is set to 1, the int2 input is selected. 2. when the int1 input is to be determined, the polarity is selected by using bit 3 of the interrupt interval determination control regis- ter ; when the int2 input is to be determined, the polarity is se- lected by using bit 4 of the interrupt interval determination control register. when the relevant bit is cleared to 0, determination is made of the interval of a positive polarity (rising transition) ; when the bit is set to 1, determination is made of the interval of a negative po- fig. 34 block diagram of interrupt interval determination circuit note : the pulse width of external interrupt int1 and int2 needs 5 or more machine cycles. data bus re 1 int1 (note) re 0 re 2 int2 32 m s 8 8 8-bit binary up counter interrupt interval determination register 64 m s address 00d7 16 control circuit selection gate : connected to black colored side at reset. ? ? ? ? t ? ? ? ? t re : interrupt interval determination control register larity (falling transition). 3. the reference clock is selected by using bit 1 of the interrupt inter- val determination control register. when the bit is cleared to 0, a 64 m s clock is selected ; when the bit is set to 1, a 32 m s clock is selected (based on an oscillation frequency of 4mhz in either case). 4. simultaneously when the input pulse of the specified polarity (ris- ing or falling transition) occurs on the int1 pin (or int2 pin), the 8- bit binary up counter starts counting up with the selected reference clock (64 m s or 32 m s). 5. simultaneously with the next input pulse, the value of the 8-bit bi- nary up counter is loaded into the determination register (address 00d7 16 ) and the counter is immediately reset (00 16 ). the refer- ence clock is input in succession even after the counter is reset, and the counter restarts counting up from 00 16 . 6. when count value fe 16 is reached, the 8-bit binary up counter stops counting. then, simultaneously when the next reference clock is input, the counter sets value ff 16 to the determination register.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 36 re i : bits i ( i = 3, 4, 5) of interrupt space distinguish control register (address 00d8 16 ) fig. 36 interrupt space distinguish control register setting value and the measuring interval fig. 35 structure of interrupt space distinguish control register count interval int1 or 2 input re 5 0 0 1 1 re 4 (re 3 ) 0 1 0 1 int2 pin input polarity switch bit 0 : positive polarity input 1 : negative polarity input interrupt interval determination mode switch bit 0 : interrupt interval determination mode 1 : pulse width determination mode int1 pin input polarity switch bit 0 : positive polarity input 1 : negative polarity input external interrupt input pin selection bit 0 : int1 input 1 : int2 input reference clock selection bit (at f (x in ) = 4mh z) 0 : 64 m s 1 : 32 m s interrupt interval determination circuit operation control bit 0 : stop 1 : operation interrupt interval determination control register (re : address 00d8 16 ) 70
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 37 reset circuit the m37210m3-xxxsp is reset according to the sequence shown in figure 39. it starts the program from the address formed by using the content of address ffff 1 6 as the high order address and the con- tent of the address fffe 16 as the low order address, when the reset pin is held at l le v el f or no less than 2 m s while the po w er voltage is 5v 10% and the crystal oscillator oscillation i s stable and then retur ned to h le v el. the inter nal initializations follo wing reset are shown in figure 37. an e xample of the reset circuit is sho wn in figure 38. the reset input voltage must be kept below 0.6v until the supply voltage sur passes 4.5v . fig. 38 example of reset circuit fig. 37 internal state at reset notes 1 : since the contents of both registers other than th ose listed above and the ram are undefined at reset, it is necessary to set initial values. 0 is read from all bits which is not used. 2 : the m37211m2-xxxsp is 3 : the m37211m2-xxxsp dose not have this register. power on reset input voltage 0v 4.5v 0.6v m51953al 1 5 4 3 vcc reset vss m37210m4-xxxsp 27 30 26 power source voltage 0v 0.1 f 00 16 00 16 00 16 0 0000 0000 address contents of address fffe 16 00 16 (1) port p0 directional register (2) port p1 directional register (3) port p2 directional register (4) port p3 (5) port p3 directional register (6) port p4 (7) port p4 directional register (8) port p5 (9) port p5 directional register ( 10 ) port p6 ( 11 ) port p6 directional register ( 12 ) 14da-l register ( 13 ) pwm0 register ( 14 ) pwm1 register ( 15 ) pwm2 register ( 16 ) pwm3 register ( 17 ) pwm4 register ( 18 ) pwm output control register 1 ( 19 ) ( 20 ) ( 21 ) (00c1 16 ) (00c3 16 ) (00c5 16 ) (00c6 16 ) (00c7 16 ) (00c8 16 ) (00c9 16 ) ( 00ca 16 ) ( 00cb 16 ) (00cc 16 ) (00cd 16 ) (00cf 16 ) (00d0 16 ) (00d1 16 ) (00d2 16 ) (00d3 16 ) (00d4 16 ) (00d5 16 ) (00d6 16 ) (00d7 16 ) (00d8 16 ) (00dc 16 ) (00e0 16 ) (00e1 16 ) (00e2 16 ) (00e4 16 ) (00e5 16 ) (00e6 16 ) (00e7 16 ) 00 000 1 111 00 16 00 0 0 11 1 1 0000 0 0 0 0 0 0000 0 0 ( 22 ) serial i/o mode register ( 23 ) horizontal position register ( 24 ) vertical position register 1 ( 25 ) vertical position register 2 ( 26 ) character size register ( 27 ) border selection register ( 28 ) color register 0 ( 29 ) color register 1 interrupt interval determination register interrupt interval determination control register 000 0 000 0 0 0000 ( 30 ) color register 2 ( 31 ) color register 3 ( 32 ) crt control register ( 33 ) crt port control register ( 34 ) a-d mode register ( 35 ) a-d control register ( 36 ) timer 1 ( 37 ) timer 2 ( 38 ) timer 3 ( 39 ) timer 4 ( 40 ) timer 12 mode register ( 41 ) timer 34 mode register ( 42 ) pwm5 register ( 43 ) pwm6 register (note 3) ( 44 ) pwm7 register (note 3) ( 45 ) cpu mode register ( 46 ) interrupt request register 1 ( 47 ) interrupt request register 2 ( 48 ) interrupt control register 1 ( 49 ) interrupt control register 2 ( 50 ) processor status register ( 51 ) program counter (00e8 16 ) (00e9 16 ) ( 00ea 16 ) ( 00ec 16 ) (00ee 16 ) (00ef 16 ) (00f0 16 ) (00f1 16 ) (00f2 16 ) (00f3 16 ) (00f4 16 ) (00f5 16 ) (00f6 16 ) (00f7 16 ) (00f8 16 ) (00fb 16 ) (00fc 16 ) (00fd 16 ) (00fe 16 ) (00ff 16 ) (ps) (pc m ) (pc l ) 000 00 000 0 000 0 000 000 00 0 0 000 00 000 00 000 0 1 1 100 111 0 0 000 0 0 000 0 1 ff 16 07 16 ff 16 07 16 00 0 000 0 0 0 pwm output control register 2(note 2) contents of address ffff 16 00 0
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 38 fig. 39 reset sequence ?pc h pc l ps ad l ad h ? ? 00,s 00,s-1 00,s-2 fffe ffff ? x in reset internal reset sync address data 32768 count of x in clock cycle (note 3) reset address from the vector table f ad h, ad l note 1 : f (x in ) and f ( f ) are in the relationship : f (x in ) = 2 f ( f ). 2 : a question mark (?) indicates an undefined state that depends on the previous state. 3 : immediately after a reset, ff 16 is automatically set in timer 3 and 07 16 in timer 4 and timer 4, timer 3 and the clock (f (x in ) divided by 16) are connected in series. reset state is canceled by the overflow signal of timer 4.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 39 i/o ports (1) port p0 port p0 is an 8-bit i/o port with n-channel open-drain output. as shown in the memory map (figure 3), port p0 can be ac- cessed at zero page memory address 00c0 16 . port p0 has a directional register (address 00c1 16 ) which can be used to program each individual bit as input (0) or as output (1). if the pins are programmed as output, the output data is latched to the port register and then output. when data is read from the output port the output pin level is not read, only the latched data in the port register is read. this allows a previously output value to be read correctly even though the output voltage level is shifted up or down. pins set as input are in the floating state and the signal levels can thus be read. when data is written into the input port, the data is latched only to the port latch and the pin still remains in the float- ing state. ports p0 0 -p0 3 are in common with 6-bit pwm outputs pwm4- pwm7. for the m37211m2, ports p0 0 and p0 1 are in common with 6-bit pwm outputs pwm4 and pwm5. (2) port p1 port p1 has basically the same function as port p0 except the output structure is cmos output. but, pins p1 5 -p1 7 are input ports and in common with analog input pins a-d1-a-d3. (3) port p2 port p2 has basically the same function as port p1. (4) port p3 port p3 are a 2-bit i/o port and a 4-bit input port with function similar to port p2, but the output structure of p3 0 , p3 1 is cmos output. p3 2 , p3 3 are in common with the external clock input pins of timer 2 and 3. p3 4 , p3 5 are in common with the external interrupt input pins int1, int2 and p3 5 with the analog input pin of a-d comparator a-d4. (5) port p4 port p4 are a 2-bit i/o port and a 1-bit input port with function similar to port p2, but the output structure is n-channel open- drain output. when a serial i/o function is selected, p4 0 -p4 2 are in common with pins s out , s clk and s in . (6) osc1, osc2 pins clock input/output pins for crt display function. (7) h sync , v sync pins h sync is a horizontal synchronizing signal input pin for crt dis- play. v sync is a vertical synchronizing signal input pin for crt display. (8) r, g, b, out pins this is an 4-bit output pin for crt display and in common with p5 2 -p5 5 . (9) port p6 port p6 is an 4-bit output port with function similar to port p0, but the output structure is n-channel opendrain output. this port is in common with 6-bit pwm output pin pwm0-pwm3. (10) d-a pin this is a 14-bit pwm output pin.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 40 fig. 40 i/o pin block diagram (1) note : p4 0 , p4 1 can also be used as serial i/o pins. directional register port latch data bus cmos 3-state output port p1 0 ?p1 4 , p2, p3 0 , p3 1 port p1 0 ?p1 4 , p2, p3 0 , p3 1 directional register port latch data bus n-channel open-drain output port p4 0 ,p4 1 directional register port latch data bus n-channel open-drain output port p0 port p0 port p4 0 ,p4 1 s in /s clk
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 41 fig. 41 i/o pin block diagram (2) note : p1 5 C p1 7 are in common with input pins for a-d comparator. p3 2 , p3 3 are in common with timer inputs. p3 4 , p3 5 are in common with external interrupt inputs. p4 2 is in common with input pins of serial i/o pins. note : pins r, g, b, and out can also be used as output ports p5 2 C p5 5 . n-channel open-drain output port p6 h sync , v sync schmitt input h sync , v sync cmos output d-a, r, g, b, out data bus port p1 5 ?p1 7 port p1 5 ?p1 7 internal circuit d-a, r, g, b, out data bus ports p3 2 ?p3 5 , p4 2 tim2, tim3, int1, int2, or s in internal circuit port p6 data bus port latch note : p6 can also be used as 6-bit pwm output pins.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 42 clock generating circuit the built-in clock generating circuit is shown in figure 44. when the stp instruction is executed, the internal clock f stops os- cillating at h level. at the same time, timers 3 and 4 are connected in hardware and ff 16 is set in the timer 3, 07 16 is set in the timer 4. select f(x in )/16 as the timer 3 count source (set bit 0 of the timer 34 mode register to 0 before the execution of the stp instruction). and besides, set the timer 3 and timer 4 interrupt enable bits to dis- abled (0) before execution of the stp instruction. the oscillator is restarted when an external interrupt is accepted. however, the internal clock f keeps its h level until timer 4 over- flows. this is because the oscillator needs a set-up period if a ceramic reso- nator or a quartz-crystal oscillator is used. when the wit instruction is executed, the internal clock f stops in the h level but the oscillator continues running. this wait state is cleared when an interrupt is accepted (note). since the oscillation does not stop, the next instructions are executed at once. to return from the stop or the wait state, set the interrupt enable bit to 1 before executing the stp or the wit instruction. note : in the wait mode, the following interrupts are invalid. (1) v sync interrupt (2) crt interrupt (3) timer 2 interrupt using p3 2 /tim2 pin input as count source (4) timer 3 interrupt using p3 3 /tim3 pin input as count source (5) timer 4 interrupt using f(x in )/2 as count source the circuit example using a ceramic resonator (or a quartz crystal oscillator) is shown in figure 42. use the circuit constants in accordance with the resonator manufactures recommended values. fig. 44 clock generating circuit block diagram interrupt request interrupt disable flag i reset sq r sq r s q r reset stp instruction timer 4 timer 3 1/2 1/8 internal clock f tim3 t34m 2 t34m 0 x in x out wit instruction stp instruction selection gate: connected to black colored side at reset. ? ? t ? ? t fig. 42 ceramic resonator circuit example fig. 43 external clock input circuit example m37210m3-xxxsp x in x out 24 25 c in c out m37210m3-xxxsp x in external oscillation circuit vcc vss 24 the example of external clock usage is shown in figure 43 x in is the input, and x out is open.
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 43 d a t a req uired for mask orders the following are necessary when ordering a mask rom product ion. (1) mask rom order confirmation form (2) mark specification form (3) data to be written to rom, in eprom form (28-pin dip typ e 27256, three identical copies) pr om pr ogramming method the b uilt-in pr om of the b lank one time pr om version and b uilt-in eprom version can be read or programmed with a general-purpo se pr om prog r ammer using a special progr amming adapter . product m37210e4sp m37210e4fp name of prog r amming adapter pca4754 pca4756 the pr om of the b lank one time pr om v ersion is not tested or screened in the assemb ly process and f ollo wing processes . t o ensure proper operation after programming, the procedure sho wn in figure 45 is recommended to verify programming. fig. 45 prog r amming and testing of one time pr om v ersion programming with prom programmer screening (caution) (150 for 40 hours) verification with prom programmer functional check in target device caution : the screening temperature is far higher than the storage temperature. never expose to 150c ex- ceeding 100 hours. pr ogramming no tes (1) the divide r atio of the timer is 1/ (n + 1). (2) even though the bbc and bbs instructions are executed im me- diately after the interrupt request bits are modified (by th e pro- gram), those instructions are only valid for the contents be fore the modification. at least one instr uction cycle is needed (such as an nop) between the modification of the interrupt request bi ts and the execution of the bbc and bbs instructions. (3) after the adc and sbc instructions are e xecuted (indecimal op- eration mode), one instruction cycle (such as an nop) is nee ded before the sec, clc, or cld instructions are executed. (4) an nop instr uction is needed immediately after the e x ecution of a plp instruction. (5) in order to avoid noise and latch-up, connect a bypass c apacitor ( ? 0.1 m f) directly betw een the v cc pin and v ss pin using a thic k wire.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 44 parameter power source voltage (note 4) during the cpu and the crt operation power source voltage h input voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 5 , p4 0 C p4 2 , h sync , v sync , reset, x in , osc1, tim2, tim3, int1, int2, s in , s clk l input voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 5 , p4 0 C p4 2 l input voltage tim2, tim3, int1, int2, s in , s clk , h sync , v sync , reset, x in , osc1 h average output current (note 1) r, g, b, out, p1 0 C p1 4 , p2 0 C p2 7 , p3 0 , p3 1 , d-a l average output current (note 2) r, g, b, out, p1 0 C p1 4 , p2 0 C p2 3 , p3 0 , p3 1 , p4 0 , p4 1 , d-a l average output current (note 2) p6 0 C p6 3 , p0 0 C p0 7 l average output current (note 3) p2 4 C p2 7 oscillation frequency (for cpu operation)(note 5) oscillation frequency (for crt display) input frequency tim2, tim3, int1, int2 input frequency s clk parameter power source voltage input voltage cnv ss input voltage p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 5 , p4 0 C p4 2 , h sync , v sync , reset, osc1, x in output voltage p1 0 C p1 4 , p2 0 C p2 7 , p3 0 , p3 1 , p4 0 , p4 1 , r, g, b, out, d-a, x out , osc2 output voltage p6 0 C p6 3 , p0 0 C p0 7 h average output current r, g, b, out, p1 0 C p1 4 , p2 0 C p2 3 , p3 0 , p3 1 , d-a l average output current r, g, b, out, p1 0 C p1 4 , p2 0 C p2 3 , p3 0 , p3 1 , p4 0 , p4 1 d-a l average output current p6 0 C p6 3 , p0 0 C p0 7 l average output current p2 4 C p2 7 power dissipation operating temperature storage temperature absolute maximum ratings symbol v cc v ss v ih v il v il i oh i ol1 i ol2 i ol3 f cpu f crt fhs fhs min. 4.5 0 0.8v cc 0 0 3.6 4.0 max. 5.5 0 v cc 0.4v cc 0.2v cc 1 2 1 10 8.1 6.0 100 1 limits unit v v v v v ma ma ma ma mhz mhz khz mhz (v cc = 5v 10%, ta = C10 to 70c unless otherwise noted) recommended operating conditions symbol v cc v i v i v o v o i oh i ol1 i ol2 i ol3 pd topr tstg conditions all voltages are based on v ss . output transistors are cut off. ta = 25c ratings C 0.3 to 6 C 0.3 to 6 C 0.3 to v cc + 0.3 C 0.3 to v cc + 0.3 C 0.3 to 13 0 to 1 (note 1) 0 to 2 (note 2) 0 to 1 (note 2) 0 to 10 (note 3) 550 C 10 to 70 C 40 to 125 unit v v v v v ma ma ma ma mw c c ty p . 5.0 0 4.0 5.0 notes 1 : the total current that flows out of the ic should be 20ma (max.). 2: the total of i ol1 and i ol2 should be 30ma (max.). 3 : the total of i ol of port p2 4 -p2 7 should be 20ma (max.). 4: connect 0.022 m f or more capacitor externally between the v cc C v ss power source pins so as to reduce power source noise. also connect 0.068 m f or more capacitor externally between the v cc C cnv ss pins. 5 : use a quartz-crystal oscillator or a ceramic resonator for cpu oscillation circuit.
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 45 parameter power source current h output voltage p1 0 C p1 4 , p2 0 C p2 7 , p3 0 , p3 1 , r, g, b, out, d-a l output voltage p1 0 C p1 4 , p2 0 C p2 3 , p3 0 , p3 1 , p4 0 , p4 1 , r, g, b, out, d-a l output voltage p6 0 C p6 3 , p0 0 C p0 7 l output voltage p2 4 C p2 7 hysteresis reset hysteresis (note) h sync , v sync , tim2, tim3, int1, int2, s in , s clk h input leak current reset, p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 5 , p4 0 C p4 2 , h sync , v sync l input leak current reset, p0 0 C p0 7 , p1 0 C p1 7 , p2 0 C p2 7 , p3 0 C p3 5 , p4 0 C p4 2 , p6 0 C p6 3 , h sync , v sync h input leak current p6 0 C p6 3 , p0 0 C p0 7 electric characteristics (v cc = 5v 10%, v ss = 0v, ta = C 10 to 70c, f (x in ) = 4mhz unless otherwise noted) c r t c r t off on off on min. C C C C C 2.4 limits ty p . 10 20 20 30 C 0.5 0.5 test conditions v cc = 5.5v f (x in ) = 4mhz v cc = 5.5v f (x in ) = 8mhz at stop mode v cc = 4.5v i oh = C 0.5ma v cc = 4.5v i ol = 0.5ma v cc = 4.5v i ol = 0.5ma v cc = 4.5v i ol = 10.0ma v cc = 5.0v v cc = 5.0v v cc = 5.5v v i = 5.5v v cc = 5.5v v i = 0v v cc = 5.5v v o = 12v symbol i cc v oh v ol v t + C v t C i izh i izl i ozh note : p3 2 C p3 5 , have the hysteresis when these pins are used as interrupt input pins or timer input pins. p4 0 C p4 2 have the hysteresis when these pins are used as serial i/o ports. max. 20 40 40 60 300 0.4 0.4 3.0 0.7 1.3 5 5 10 unit ma ma m a v v v m a m a m a
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 46 p a cka ge outline
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 47 gzz?h06?9b < 25c0 > 740 family mask rom confirmation form single-chip microcomputer m37210m3-xxxsp/fp mitsubishi electric mask rom number date : supervisor signature receipt section head signature h customer company name date issued date : tel ( ) note : please fill in all items marked h . submitted by supervisor issuance signature h 1. confirmation specify the name of the product being ordered and the type of eproms submitted. three eproms are required for each pattern. if at least two of the three sets of eproms submitted contain identical data, we will produce masks based on this data. we shall assume the responsibility for errors only if the mask rom data on the products we produce differs from this data. thus, extreme care must be taken to verify the data in the submitted eproms. aaa checksum code for entire eprom (hexadecimal notation) 27256 eprom address 0000 16 aaa aaa product name ascii code : ?37210m3 rom (12k bytes) 000f 16 15ff 16 1800 16 1dff 16 set ?f 16 ?in the shaded area. write the ascii codes that indicates the product name of ?37210m3 to addresses 0000 16 to 000f 16 . (1) (2) eprom type (indicate the type used) 1000 16 character rom1 5000 16 7fff 16 character rom2 h 2. mark specification mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate mark specification form (52p4b for m37210m3-xxxsp; 64p6n for m37210m3-xxxfp) and attach to the mask rom confirmation form. h 3. comments (1/3) microcomputer name : m37210m3-xxxsp m37210m3-xxxfp
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 48 gzzCsh06C09b < 25c0 > 740 family mask rom confirmation form single-chip microcomputer m37210m3-xxxsp/fp mitsubishi electric m = 16 4d 16 3 = 33 16 7 = 3 7 16 2 = 3 2 16 1 = 3 1 16 0 = 3 0 16 m = 4d 16 3 = 3 3 0000 16 0001 16 0002 16 0003 16 0004 16 0005 16 0006 16 0007 16 address C = 16 2 d 16 ff 16 ff 16 ff 16 ff 16 ff 16 ff 16 ff 0008 16 0009 16 000a 16 000b 16 000c 16 000d 16 000e 16 000f 16 address addresses 0000 16 to 000f 16 store the product name, and addresses 1000 16 to 15ff 16 and addresses 1800 16 to 1dff 16 store the character pattern. if the name of the product contained in the eproms does not match the name on the mask rom confirmation form, the rom processing is disabled. write the data correctly. inputting the name of the product with the ascii code ascii codes m37210m3- are listed on the right. the addresses and data are in hexadecimal notation. 1. inputting the character rom input the character rom data by dividing it into character r om1 and character rom2. for the character rom data, see the next page and on. 2. writing the product name and character rom data onto eproms (2/3)
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 49 gzz?h06?9b < 25c0> 740 family mask rom confirmation form single-chip microcomputer m37210m3-xxxsp/fp mitsubishi electric the structure of character rom (divided of 12 5 16 dots font) example character code ?a 16 example 11a0 16 to 11af 16 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 1 2 3 4 5 6 7 8 9 a b c d e f 00 16 04 16 04 16 0a 16 0a 16 11 16 11 16 11 16 20 16 20 16 3f 16 40 16 40 16 40 16 00 16 00 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f8 16 f8 16 f8 16 f4 16 f4 16 f4 16 f0 16 f0 16 example 19a0 16 to 19af 16 character rom1 character rom2 f 16 (3/3)
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 50 gzz?h06?0b < 25b0 > 740 family mask rom confirmation form single-chip microcomputer m37210m4-xxxsp mitsubishi electric mask rom number date : supervisor signature receipt section head signature h customer company name date issued date : tel ( ) note : please fill in all items marked h . submitted by supervisor issuance signature h 1. confirmation specify the name of the product being ordered and the type of eproms submitted. three eproms are required for each pattern. if at least two of the three sets of eproms submitted contain identical data, we will produce masks based on this data. we shall assume the responsibility for errors only if the mask rom data on the products we produce differs from this data. thus, extreme care must be taken to verify the data in the submitted eproms. aaa checksum code for entire eprom (hexadecimal notation) 27256 eprom address 0000 16 aaa aaa product name ascii code : ?37210m4 rom (16k bytes) 000f 16 15ff 16 1800 16 1dff 16 set ?f 16 ?in the shaded area. write the ascii codes that indicates the product name of ?37210m4 to addresses 0000 16 to 000f 16 . (1) (2) eprom type (indicate the type used) 1000 16 character rom1 4000 16 7fff 16 character rom2 h 2. mark specification mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate mark specification form (52p4b for m37210m4-xxxsp) and attach to the mask rom confirmation form. h 3. comments (1/3)
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 51 gzzCsh06C10b < 25b0 > 740 family mask rom confirmation form single-chip microcomputer m37210m4-xxxsp mitsubishi electric m = 16 4d 16 3 = 3 3 16 7 = 3 7 16 2 = 3 2 16 1 = 3 1 16 0 = 3 0 16 m = 4d 16 4 = 3 4 0000 16 0001 16 0002 16 0003 16 0004 16 0005 16 0006 16 0007 16 address C = 16 2 d 16 ff 16 ff 16 ff 16 ff 16 ff 16 ff 16 ff 0008 16 0009 16 000a 16 000b 16 000c 16 000d 16 000e 16 000f 16 address addresses 0000 16 to 000f 16 store the product name, and addresses 1000 16 to 15ff 16 and addresses 1800 16 to 1dff 16 store the character pattern. if the name of the product contained in the eproms does not match the name on the mask rom confirmation form, the rom processing is disabled. write the data correctly. inputting the name of the product with the ascii code ascii codes m37210m4- are listed on the right. the addresses and data are in hexadecimal notation. 1. inputting the character rom input the character rom data by dividing it into character r om1 and character rom2. for the character rom data, see the next page and on. 2. writing the product name and character rom data onto eproms (2/3)
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 52 gzz?h06?0b < 25b0 > 740 family mask rom confirmation form single-chip microcomputer m37210m4-xxxsp mitsubishi electric the structure of character rom (divided of 12 5 16 dots font) example character code ?a 16 example 11a0 16 to 11af 16 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 1 2 3 4 5 6 7 8 9 a b c d e f 00 16 04 16 04 16 0a 16 0a 16 11 16 11 16 11 16 20 16 20 16 3f 16 40 16 40 16 40 16 00 16 00 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f8 16 f8 16 f8 16 f4 16 f4 16 f4 16 f0 16 f0 16 example 19a0 16 to 19af 16 character rom1 character rom2 f 16 (3/3)
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 53 aaa gzz?h06?1b < 25b1 > 740 family mask rom confirmation form single-chip microcomputer m37211m2-xxxsp mitsubishi electric mask rom number date : supervisor signature receipt section head signature h customer company name date issued date : tel ( ) note : please fill in all items marked h . submitted by supervisor issuance signature h 1. confirmation specify the name of the product being ordered and the type of eproms submitted. three eproms are required for each pattern. if at least two of the three sets of eproms submitted contain identical data, we will produce masks based on this data. we shall assume the responsibility for errors only if the mask rom data on the products we produce differs from this data. thus, extreme care must be taken to verify the data in the submitted eproms. checksum code for entire eprom (hexadecimal notation) 27256 eprom address 0000 16 aaa aaa product name ascii code : ?37211m2 rom (8k bytes) 000f 16 15ff 16 1800 16 1dff 16 set ?f 16 ?in the shaded area. write the ascii codes that indicates the product name of ?37211m2 to addresses 0000 16 to 000f 16 . (1) (2) eprom type (indicate the type used) 1000 16 character rom1 6000 16 7fff 16 character rom2 h 2. mark specification mark specification must be submitted using the correct form for the type package being ordered fill out the appropriate mark specification form (52p4b for m37211m2-xxxsp) and attach to the mask rom confirmation form. h 3. note set the stack page selection bit to ?? because this bit is set to ??after reset but the internal ram is located at 0 page only. both p0 2 pin (9th pin) and p0 3 pin (10th pin) are not used as pwm output pins. (1) (2) h 4. comments (1/3)
mitsubishi micr ocomputers m37210m3-xxxsp/fp , m37210m4-xxxsp , m37211m2-xxxsp m37210e4-xxxsp/fp , m37210e4sp/fp single-chip 8-bit cmos micr ocomputer f or v ol t age synthesizer with on-screen displa y contr oller 54 gzzCsh06C11b< 25b1 > 740 family mask rom confirmation form single-chip microcomputer m37211m2-xxxsp mitsubishi electric m = 16 4d 16 3 = 3 3 16 7 = 3 7 16 2 = 3 2 16 1 = 3 1 16 1 = 3 1 16 m = 4d 16 2 = 32 0000 16 0001 16 0002 16 0003 16 0004 16 0005 16 0006 16 0007 16 address C = 16 2 d 16 ff 16 ff 16 ff 16 ff 16 ff 16 ff 16 ff 0008 16 0009 16 000a 16 000b 16 000c 16 000d 16 000e 16 000f 16 address addresses 0000 16 to 000f 16 store the product name, and addresses 1000 16 to 15ff 16 and addresses 1800 16 to 1dff 16 store the character pattern. if the name of the product contained in the eproms does not match the name on the mask rom confirmation form, the rom processing is disabled. write the data correctly. inputting the name of the product with the ascii code ascii codes m37211m2- are listed on the right. the addresses and data are in hexadecimal notation. 1. inputting the character rom input the character rom data by dividing it into character r om1 and character rom2. for the character rom data, see the next page and on. 2. writing the product name and character rom data onto eproms (2/3)
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 55 gzz?h06?1b < 25b1 > 740 family mask rom confirmation form single-chip microcomputer m37211m2-xxxsp mitsubishi electric the structure of character rom (divided of 12 5 16 dots font) example character code ?a 16 example 11a0 16 to 11af 16 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 1 2 3 4 5 6 7 8 9 a b c d e f 00 16 04 16 04 16 0a 16 0a 16 11 16 11 16 11 16 20 16 20 16 3f 16 40 16 40 16 40 16 00 16 00 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f0 16 f8 16 f8 16 f8 16 f4 16 f4 16 f4 16 f0 16 f0 16 example 19a0 16 to 19af 16 character rom1 character rom2 f 16 (3/3)
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 56
mitsubishi microcomputers m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp m37210e4-xxxsp/fp, m37210e4sp/fp single-chip 8-bit cmos microcomputer for voltage synthesizer with on-screen display controller 57
sep. first edition 1996 h-df319-b editioned by committee of editing of mitsubishi semiconductor data boo k published by mitsubishi electric corp., semiconductor division this book, or parts thereof, may not be reproduced in any fo rm without permissio n o f mitsubishi electric corporation. mitsubishi data book single-chip 8-bit microcomputers vol.3
rev. rev. no. date 1.0 first edition 9708 2.0 information about copyright note, revision number, release date added (last page). 971130 m37210m3-xxxsp/fp, m37210m4-xxxsp, m37211m2-xxxsp, m37210e4-xxxsp/fp, m37210e4sp/fp data sheet revision description revision description list (1/1)

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